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This is a list of microprocessors designed by Advanced Micro Devices, under the AMD Accelerated Processing Unit product series.

Features overview[edit]

The following table shows features of AMD's APUs

  1. ^ For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845.
  2. ^ A PC would be one node.
  3. ^ An APU combines a CPU and a GPU. Both have cores.
  4. ^ Requires firmware support.
  5. ^ No SSE4. No SSSE3.
  6. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  7. ^ Unified shaders : texture mapping units : render output units
  8. ^ a b To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  9. ^ To feed more than two displays, the additional panels must have native DisplayPort support.[10] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
  10. ^ a b DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

Graphics API overview[edit]

The following table shows the graphics and compute APIs support across AMD GPU micro-architectures. Note that this table include micro-architectures not used in the APUs, and a branding series might include older generation chips.

  1. ^ Radeon 7000 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on R100's pixel shaders.
  2. ^ These series do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power-of-two (NPOT) textures.
  3. ^ OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware.

[21][22][23]

Desktop APUs[edit]

Lynx: "Llano" (2011)[edit]

  • Socket FM1
  • CPU: K10 (or Husky or K10.5) with no L3 cache cores with an upgraded architecture known as Stars
    • L1 Cache: 64 KB Data per core and 64 KB Instructions per core
  • MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a, ABM, NX bit, AMD64, Cool'n'Quiet, AMD-V
  • GPU: TeraScale 2 (Evergreen); all A and E series models feature Redwood-class integrated graphics on die (BeaverCreek for the dual-core variants and WinterPark for the quad-core variants). Sempron and Athlon models exclude integrated graphics.[24]
  • List of embedded GPU's
  • Support for up to four DIMMs of up to DDR3-1866 memory
  • Fabrication 32 nm on GlobalFoundries SOI process; Die size: 228 mm2, with 1.178 billion transistors[25][26]
  • 5 GT/s UMI
  • Integrated PCIe 2.0 controller
  • Select models support Turbo Core technology for faster CPU operation when the thermal specification permits
  • Select models support Hybrid Graphics technology to assist a discrete Radeon HD 6450, 6570, or 6670 discrete graphics card. This is similar to the current Hybrid CrossFireX technology available in the AMD 700 and 800 chipset series
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Virgo: "Trinity" (2012)[edit]

  • Fabrication 32 nm on GlobalFoundries SOI process
  • Socket FM2
  • CPU: Piledriver
    • L1 Cache: 16 KB Data per core and 64 KB Instructions per module
  • GPU TeraScale 3 (VLIW4)
  • Die Size: 246 mm2, 1.303 Billion transistors[28]
  • Support for up to four DIMMs of up to DDR3-1866 memory
  • 5 GT/s UMI
  • GPU (based on VLIW4 architecture) instruction support: DirectX 11, Opengl 4.2, DirectCompute, Pixel Shader 5.0, Blu-ray 3D, OpenCL 1.2, AMD Stream, UVD3
  • Integrated PCIe 2.0 controller, and Turbo Core technology for faster CPU/GPU operation when the thermal specification permits
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX, XOP, FMA3, FMA4, F16C,[29] ABM, BMI1, TBM
  • Sempron and Athlon models exclude integrated graphics
  • Select models support Hybrid Graphics technology to assist a Radeon HD 7350, 7450, 7470, 7550, 7570, 7670 discrete graphics card.[30][31] However, it has been found that this does not always improve 3D accelerated graphics performance.[32][33]
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Richland" (2013)[edit]

  • Fabrication 32 nm on GlobalFoundries SOI process
  • Socket FM2
  • Two or four CPU cores based on the Piledriver microarchitecture
    • Die Size: 246 mm2, 1.303 Billion transistors[37]
    • L1 Cache: 16 KB Data per core and 64 KB Instructions per module
    • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, AVX, AVX1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core 3.0, NX bit, PowerNow!
  • GPU
    • TeraScale 3 architecture
    • HD Media Accelerator, AMD Hybrid Graphics
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Kabini" (2013, SoC)[edit]

  • Fabrication 28 nm by GlobalFoundries
  • Socket AM1, aka Socket FS1b (AM1 platform)
  • 2 to 4 CPU Cores (Jaguar (microarchitecture))
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  • SoC with integrated memory, PCIe, 2× USB 3.0, 6× USB 2.0, Gigabit Ethernet, and 2× SATA III (6 Gb/s) controllers
  • GPU based on Graphics Core Next (GCN)
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Kaveri" (2014) & "Godavari" (2015)[edit]

  • Fabrication 28 nm by GlobalFoundries.
  • Socket FM2+,[40] support for PCIe 3.0.
  • Two or four CPU cores based on the Steamroller microarchitecture.
    • Kaveri refresh models have codename Godavari.[41]
  • Die Size: 245 mm2, 2.41 Billion transistors.[42]
  • L1 Cache: 16 KB Data per core and 96 KB Instructions per module.
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
  • Three to eight Compute Units (CUs) based on GCN 2nd gen microarchitecture;[43] 1 Compute Unit (CU) consists of 64 Unified Shader Processors : 4 Texture Mapping Units (TMUs) : 1 Render Output Unit (ROPs).
  • Heterogeneous System Architecture-enabled zero-copy through pointer passing.
  • SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio.[44]
  • Dual-channel (2× 64 Bit) DDR3 memory controller.
  • Integrated custom ARM Cortex-A5 co-processor[45] with TrustZone Security Extensions[46] in select APU models, except the Performance APU models.[47]
  • Select models support Hybrid Graphics technology by using a Radeon R7 240 or R7 250 discrete graphics card.[48]
  • Display controller: AMD Eyefinity 2, 4K Ultra HD support, DisplayPort 1.2 Support.[49]
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Carrizo" (2016)[edit]

  • Fabrication 28 nm by GlobalFoundries
  • Socket FM2+, AM4, support for PCIe 3.0
  • Two or four CPU cores based on the Excavator microarchitecture
  • Die Size: 250.04 mm2, 3.1 Billion transistors[53]
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
  • Dual-channel DDR3 or DDR4 memory controller
  • Third Generation GCN based GPU
  • Integrated custom ARM Cortex-A5 co-processor[45] with TrustZone Security Extensions[46][47]
  1. ^ With cooler if available.
  2. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  3. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Bristol Ridge" (2016)[edit]

  • Fabrication 28 nm by GlobalFoundries
  • Socket AM4, support for PCIe 3.0
  • Two or four "Excavator+" CPU cores
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
  • Dual-channel DDR4 memory controller
  • PCI Express 3.0 x8 (No Bifurcation support, requires a PCI-e switch for any configuration other than x8)
  • PCI Express 3.0 x4 as link to optional external chipset
  • 4x USB 3.1 Gen 1
  • Storage: 2x SATA and 2x NVMe or 2x PCI Express
  • Third Generation GCN based GPU[56] with hybrid VP9 decoding
  1. ^ A box without cooler might also be available (WOF).
  2. ^ With cooler if available.
  3. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  4. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Raven Ridge" (2018)[edit]

  • Fabrication 14 nm by GlobalFoundries
  • Transistors: 4.94 billion
  • Die size: 210 mm²
  • Socket AM4
  • Zen CPU cores
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
  • Dual-channel DDR4 memory controller
  • Fifth generation GCN based GPU
  • Video Core Next (VCN) 1.0
  1. ^ AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.[58]
  2. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  3. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Picasso" (2019)[edit]

  • Fabrication 12 nm by GlobalFoundries
  • Transistors: 4.94 billion
  • Die size: 210 mm²
  • Socket AM4
  • Zen+ CPU cores
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
  • Dual-channel DDR4 memory controller
  • Fifth generation GCN based GPU
  • Video Core Next (VCN) 1.0
  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


"Renoir" (2020)[edit]

  • Fabrication 7 nm by TSMC
  • Socket AM4
  • Up to eight Zen 2 CPU cores
  • Dual-channel DDR4 memory controller
  1. ^ Core complexes (CCXs) × cores per CCX
  2. ^ Unified shaders : texture mapping units : render output units and compute units (CU)
  3. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.



"Cezanne" (2021)[edit]

  • Fabrication 7 nm by TSMC
  • Socket AM4
  • Up to eight Zen 3 CPU cores
  • Dual-channel DDR4 memory controller
  1. ^ Core Complexes (CCX) × cores per CCX
  2. ^ Unified shaders : texture mapping units : render output units and compute units (CU)
  3. ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  4. ^ As of April 2021, retail availability expected later in 2021[93].


Server APUs[edit]

Opteron X2100-series "Kyoto" (2013)[edit]

  • Fabrication 28 nm
  • Socket FT3 (BGA)
  • 4 CPU Cores (Jaguar (microarchitecture))
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  • Turbo Dock Technology, C6 and CC6 low power states
  • GPU based on GCN (Graphics Core Next) architecture
  1. ^ A box without cooler might also be available (WOF).
  2. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  3. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Opteron X3000-series "Toronto" (2017)[edit]

  • Fabrication 28 nm
  • Socket FP4
  • Two or Four CPU cores based on the Excavator microarchitecture[99][100]
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
  • DDR4 SDRAM
  • GPU based on 3rd Generation GCN (Graphics Core Next) architecture
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Mobile APUs[edit]

Sabine: "Llano" (2011)[edit]

  • Fabrication 32 nm on GlobalFoundries SOI process
  • Socket FS1
  • Upgraded Stars (AMD 10h architecture) codenamed Husky CPU cores (K10.5) with no L3 cache, and with Redwood-class integrated graphics on die
  • L1 Cache: 64 KB Data per core and 64 KB Instructions per core(BeaverCreek for the dual-core variants and WinterPark for the quad-core variants)
  • Integrated PCIe 2.0 controller
  • GPU: TeraScale 2
  • Select models support Turbo Core technology for faster CPU operation when the thermal specification permits
  • Support for 1.35 V DDR3L-1333 memory, in addition to regular 1.5 V DDR3 memory specified
  • 2.5 GT/s UMI
  • MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
  • PowerNow!
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Comal: "Trinity" (2012)[edit]

An AMD A10-4600M APU
  • Fabrication 32 nm on GlobalFoundries SOI process
  • Socket FS1r2, FP2
  • Based on the Piledriver architecture
  • L1 Cache: 16 KB Data per core and 64 KB Instructions per module
  • GPU: TeraScale 3 (VLIW4)
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
  • Memory support: 1.35 V DDR3L-1600 memory, in addition to regular 1.5 V DDR3 memory specified (Dual-channel)
  • 2.5 GT/s UMI
  • Transistors: 1.303 billion
  • Die size: 246 mm²
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Richland" (2013)[edit]

  • Fabrication 32 nm on GlobalFoundries SOI process
  • Socket FS1r2, FP2
  • Elite Performance APU.[102][103]
  • CPU: Piledriver architecture
    • L1 Cache: 16 KB Data per core and 64 KB Instructions per module
  • GPU: TeraScale 3 (VLIW4)
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Kaveri" (2014)[edit]

  • Fabrication 28 nm
  • Socket FP3
  • Up to 4 Steamroller x86 CPU cores with 4 MB of L2 cache.[104]
  • L1 Cache: 16 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
  • Three to eight Compute Units (CUs) based on Graphics Core Next (GCN)[43] microarchitecture; 1 Compute Unit (CU) consists of 64 Unified Shader Processors : 4 Texture Mapping Units (TMUs) : 1 Render Output Unit (ROPs)
  • AMD Heterogeneous System Architecture (HSA) 2.0
  • SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio[44]
  • Dual-channel (2x64-bit) DDR3 memory controller
  • Integrated custom ARM Cortex-A5 co-processor[45] with TrustZone Security Extensions[46]
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Carrizo" (2015)[edit]

  • Fabrication 28 nm
  • Socket FP4
  • Up to 4 Excavator x86 CPU cores
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
  • GPU based on Graphics Core Next 1.2
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Bristol Ridge" (2016)[edit]

  • Fabrication 28 nm
  • Socket FP4[105]
  • Two or four "Excavator+" x86 CPU cores
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
  • GPU based on Graphics Core Next 1.2 with VP9 decoding
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Raven Ridge" (2017)[edit]

  • Fabrication 14 nm by GlobalFoundries
  • Transistors: 4.94 billion
  • Socket FP5
  • Die size: 210 mm²
  • Zen CPU cores
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
  • Fifth generation GCN based GPU
  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  2. ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


"Picasso" (2019)[edit]

  • Fabrication 12 nm by GlobalFoundries
  • Socket FP5
  • Die size: 210 mm²
  • Up to four Zen+ CPU cores
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
  • Dual-channel DDR4 memory controller
  • Fifth generation GCN based GPU
  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  2. ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


"Renoir" (2020)[edit]

  • Fabrication 7 nm by TSMC[138][139][140]
  • Socket FP6
  • Die size: 156 mm²
  • 9.8 billion transistors on one single 7nm monolithic die[141]
  • Up to eight Zen 2 CPU cores
  • Fifth generation GCN based GPU (7nm Vega)
  1. ^ Core Complexes (CCX) × cores per CCX
  2. ^ Unified shaders : texture mapping units : render output units and compute units (CU)
  3. ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


"Lucienne" (2021)[edit]

  • Fabrication 7 nm by TSMC
  • Socket FP6
  • Die size: 156 mm²
  • 9.8 billion transistors on one single 7nm monolithic die[141]
  • Up to eight Zen 2 CPU cores
  • Fifth generation GCN based GPU (7nm Vega)


  1. ^ Core Complexes (CCX) × cores per CCX
  2. ^ Unified shaders : texture mapping units : render output units and compute units (CU)
  3. ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


"Cezanne" (2021)[edit]

  • Fabrication 7 nm by TSMC
  • Socket FP6
  • Die size: 180 mm²
  • Up to eight Zen 3 CPU cores
  • Fifth generation GCN based GPU (7nm Vega)


  1. ^ Active Core Complexes (CCX) × active cores per CCX.
  2. ^ Unified shaders : texture mapping units : render output units and compute units (CU)
  3. ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


Ultra-mobile APUs[edit]

Brazos: "Desna", "Ontario", "Zacate" (2011)[edit]

  • Fabrication 40 nm by TSMC
  • Socket FT1 (BGA-413)
  • Based on the Bobcat microarchitecture[175]
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
  • PowerNow!
  • DirectX 11 integrated graphics with UVD 3.0
  • Z-series denote Desna; C-series denote Ontario; and the E-series denotes Zacate
  • 2.50 GT/s UMI (PCIe 1.0 ×4)
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Brazos 2.0: "Ontario", "Zacate" (2012)[edit]

  • Fabrication 40 nm by TSMC
  • Socket FT1 (BGA-413)
  • Based on the Bobcat microarchitecture[175]
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
  • PowerNow!
  • DirectX 11 integrated graphics
  • C-series denote Ontario; and the E-series denotes Zacate
  • 2.50 GT/s UMI (PCIe 1.0 ×4)
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Brazos-T: "Hondo" (2012)[edit]

  • Fabrication 40 nm by TSMC
  • Socket FT1 (BGA-413)
  • Based on the Bobcat microarchitecture[175]
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • Found in tablet computers
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
  • PowerNow!
  • DirectX 11 integrated graphics
  • 2.50 GT/s UMI (PCIe 1.0 ×4)
  1. ^ AMD in its technical documentation uses KB, which it defines as "kilobyte" and as equal to 1024 B (i.e., 1 KiB), and MB, which it defines as "megabyte" and as equal to 1024 KB (1 MiB).[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Kabini", "Temash" (2013)[edit]

  • Fabrication 28 nm by TSMC
  • Socket FT3 (BGA)
  • 2 to 4 CPU Cores (Jaguar (microarchitecture))
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  • Turbo Dock Technology, C6 and CC6 low power states
  • GPU based on Graphics Core Next (GCN)
  • AMD Eyefinity multi-monitor for up to two displays

Temash, Elite Mobility APU[edit]

  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]

Kabini, Mainstream APU[edit]

  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]

"Beema", "Mullins" (2014)[edit]

  • Fabrication 28 nm by GlobalFoundries
  • Socket FT3b (BGA)
  • CPU: 2 to 4 (Puma cores)
    • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • GPU based on Graphics Core Next (GCN)
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  • Intelligent Turbo Boost
  • Platform Security Processor, with an integrated ARM Cortex-A5 for TrustZone execution

Mullins, Tablet/2-in-1 APU[edit]

  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]

Beema, Notebook APU[edit]

  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]

"Carrizo-L" (2015)[edit]

  • Fabrication 28 nm by GlobalFoundries
  • Socket FT3b (BGA), FP4 (µBGA)[178]
  • CPU: 2 to 4 (Puma+ cores)
    • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • GPU based on Graphics Core Next (GCN)
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  • Intelligent Turbo Boost
  • Platform Security Processor, with an integrated ARM Cortex-A5 for TrustZone execution
  • All models except A8-7410 available in both laptop and all-in-one desktop versions
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]

"Stoney Ridge" (2016)[edit]

  • Fabrication 28 nm by GlobalFoundries
  • Socket FP4[105] / FT4
  • 2 "Excavator+" x86 CPU cores
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
  • GPU based on Graphics Core Next 3rd Generation with VP9 decoding
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Dalí", "Pollock" (2020)[edit]

  • Fabrication 14 nm by GlobalFoundries
  • Socket FP5 / FT5
  • Two Zen CPU cores
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core


  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  2. ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Embedded APUs[edit]

G-Series[edit]

Brazos: "Ontario" and "Zacate" (2011)[edit]

  • Fabrication 40 nm
  • Socket FT1 (BGA-413)
  • CPU microarchitecture: Bobcat[189]
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
  • GPU microarchitecture: TeraScale 2 (VLIW5) "Evergreen"
  • Memory support: single-channel, support up to two DIMMs of DDR3-1333 or DDR3L-1066
  • 5 GT/s UMI
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Kabini" (2013, SoC)[edit]

  • Fabrication 28 nm
  • Socket FT3 (769-BGA)[190]
  • CPU microarchitecture: Jaguar
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support. No support for FMA (Fused Multiply-Accumulate). Trusted Platform Module (TPM) 1.2 support
  • GPU microarchitecture: Graphics Core Next (GCN) with Unified Video Decoder 3 (H.264, VC-1, MPEG2, etc.)
  • Single channel DDR3-1600, 1.25 and 1.35 V voltage level support, support for ECC memory
  • Integrates Controller Hub functional block, HD audio, 2 SATA channels, USB 2.0 and USB 3.0 (except GX-210JA)
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Steppe Eagle" (2014, SoC)[edit]

  • Fabrication 28 nm
  • Socket FT3b (769-BGA)
  • CPU microarchitecture: Puma
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Crowned Eagle" (2014, SoC)[edit]

  • Fabrication 28 nm
  • Socket FT3b (769-BGA)
  • CPU microarchitecture: Puma
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  • no GPU
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]

LX-Family (2016, SoC)[edit]

  • Fabrication 28 nm
  • Socket FT3b (769-BGA)
  • 2 Puma x86 cores with 1MB shared L2 cache
  • L1 Cache: 32 KB Data per core and 32 KB Instructions per core
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
  • GPU microarchitecture: Graphics Core Next (GCN) (1CU) with support for DirectX 11.2
  • Single channel 64-bit DDR3 memory with ECC
  • Integrated Controller Hub supports: PCIe® 2.0 4×1, 2 USB3 + 4 USB2 ports, 2 SATA 2.0/3.0 ports
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

I-Family: "Brown Falcon" (2016, SoC)[edit]

  • Fabrication 28 nm
  • Socket FP4[191]
  • 2 or 4 Excavator x86 cores with 1MB shared L2 cache
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
  • GPU microarchitecture: Graphics Core Next (GCN) (up to 4 CUs) with support for DirectX 12
  • Dual channel 64-bit DDR4 or DDR3 memory with ECC
  • 4K × 2K H.265 decode capability and multi format encode and decode
  • Integrated Controller Hub supports: PCIe 3.0 1×4, PCIe 2/3 4×1, 2 USB3 + 2 USB2 ports, 2 SATA 2.0/3.0 ports
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

J-Family: "Prairie Falcon" (2016, SoC)[edit]

  • Fabrication 28 nm
  • Socket FP4[194]
  • 2 "Excavator+" x86 cores with 1MB shared L2 cache
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
  • GPU microarchitecture: Radeon R5E Graphics Core Next (GCN) (up to 3 CUs) with support for DirectX 12
  • Single channel 64-bit DDR4 or DDR3 memory
  • 4K × 2K H.265 decode capability with 10-bit compatibility and multi format encode and decode
  • Integrated Controller Hub supports: PCIe 3.0 1×4, PCIe 2/3 4×1, 2 USB3 + 2 USB2 ports, 2 SATA 2.0/3.0 ports
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

R-Series[edit]

Comal: "Trinity" (2012)[edit]

  • Fabrication 32 nm
  • Socket FP2 (BGA-827), FS1r2
  • CPU microarchitecture: Piledriver
  • L1 Cache: 16 KB Data per core and 64 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX 1.1, XOP, FMA3, FMA4, F16C,[29] ABM, BMI1, TBM
  • GPU microarchitecture: TeraScale 3 (VLIW4) "Northern Islands"
  • Memory support: dual-channel 1.35 V DDR3L-1600 memory, in addition to regular 1.5 V DDR3
  • 2.5 GT/s UMI
  • Die size: 246 mm²; Transistors: 1.303 billion
  • OpenCL 1.1 and OpenGL 4.2 support
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Bald Eagle" (2014)[edit]

  • Fabrication 28 nm
  • Socket FP3
  • Up to 4 Steamroller x86 cores[195]
  • L1 Cache: 16 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX 1.1, XOP, FMA3, FMA4, F16C,[29] ABM, BMI1, TBM
  • GPU microarchitecture: Graphics Core Next (GCN) (up to 8 CUs) with support for DirectX 11.1 and OpenGL 4.2
  • Dual channel DDR3 memory with ECC
  • Unified Video Decode (UVD) 4.2 and Video Coding Engine (VCE) 2.0
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

"Merlin Falcon" (2015, SoC)[edit]

  • Fabrication 28 nm
  • Socket FP4
  • Up to 4 Excavator x86 cores[196]
  • L1 Cache: 32 KB Data per core and 96 KB Instructions per module
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
  • GPU microarchitecture: Graphics Core Next (GCN) (up to 8 CUs) with support for DirectX 12
  • Dual channel 64-bit DDR4 or DDR3 memory with ECC
  • Unified Video Decode (UVD) 6 (4K H.265 and H.264 decode) and Video Coding Engine (VCE) 3.1 (4K H.264 encode)
  • Dedicated AMD Secure Processor supports secure boot with AMD Hardware Validated Boot (HVB)
  • Integrated FCH featuring PCIe 3.0 USB3.0, SATA3, SD, GPIO, SPI, I2S, I2C, UART
  1. ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

1000-Series[edit]

V1000-Family: "Great Horned Owl" (2018, SoC)[edit]

  • Fabrication 14 nm by GlobalFoundries
  • Up to 4 Zen cores
  • Socket FP5
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
  • Dual channel DDR4 memory with ECC
  • Fifth generation GCN based GPU
  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


R1000-Family: "Banded Kestrel" (2019, SoC)[edit]

  • Fabrication 14 nm by GlobalFoundries
  • Up to 2 Zen cores
  • Socket FP5
  • MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
  • Dual channel DDR4 memory with ECC
  • Fifth generation GCN based GPU
  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


2000-Series[edit]

V2000-Family: "Grey Hawk" (2020, SoC)[edit]

  • Fabrication 7 nm by TSMC
  • Up to 8 Zen 2 cores
  • Fifth generation GCN based GPU
  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  2. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.


Custom APUs[edit]

As of May 1, 2013, AMD opened the doors of their "semi-custom" business unit.[202] Since these chips are custom-made for specific customer needs, they vary widely from both consumer-grade APUs and even the other custom-built ones. Some notable examples of semi-custom chips that have come from this sector include the chips from the PlayStation 4 and Xbox One.[203] So far the size of the integrated GPU in these semi-custom APUs exceed by far the GPU size in the consumer-grade APUs.

  1. ^ Unified Shaders : Texture Mapping Units : Render Output Units
  2. ^ Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  3. ^ Pixel fillrate is calculated as the number of ROPs multiplied by the base (or boost) core clock speed.
  4. ^ Texture fillrate is calculated as the number of TMUs multiplied by the base (or boost) core clock speed.
  5. ^ UHD BD is the only video disc format supporting HDR.
  6. ^ Cache
  7. ^ "Digital" version does not have an optical drive.
  8. ^ Feature preview of Rapid Packed Math, introduced in GCN 5 Vega.
  9. ^ Swap
  10. ^ A plain 320-bit 20GiB version could be made by just replacing four 1 GiB GDDR6 chips by 2 GiB ones.

See also[edit]

  • AMD Accelerated Processing Unit
  • List of AMD chipsets
  • List of AMD FX microprocessors
  • List of AMD graphics processing units
  • Ryzen

Notes[edit]

Note 1: The clock multiplier applies to the 200 MHz base clock. (AMD default clock base is 200 MHz)
Note 2: Unified shader processors (USPs): Texture mapping units (TMUs): Render output units (ROPs). 1 CU (Compute Unit) = 64 USPs: 4 TMUs : 1 ROPs
Note 3: Models enabled by Turbo Core technology, up to 10% clock speed increase is planned. With CPU boost, only one core of a dual-core model has boost enabled.
Note 4: K models feature an unlocked multiplier and overclockable GPU.
Note 5: One AMD module consists of two integer cores and two FPUs, which can be combined into one wide FPU for executing certain instructions, such as FMA. The two cores share certain resources, but are two separate units.

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External links[edit]

  • AMD Accelerated Processing Units official website
  • Technical specification AMD products
  • AMD products and technologies